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Tier-1 employer and Bangalore metro increase competition despite specialized PMIC validation skillset.
Highly domain-specific PMIC and ATE validation skills limit cross-industry transferability.
Explicit 7+ years, PMIC validation, FPGA and ATE experience make filters stringent.
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Own end-to-end bench validation, silicon debugging, and test automation for Power Management ICs (PMICs).
Develop and automate industry-standard tests for switching converters and define equipment requirements for PMIC testing and lab setup.
Lead small technical teams, manage bench resource utilization, and collaborate cross-geography with design and systems teams to ensure quality ICs.
7+ years of experience in bench validation and debugging of Power Management ICs.
Bachelor’s or master’s degree in electrical engineering.
Proficiency in Python, C, LabView, ATE program debugging, and experience with validation equipment and FPGA-based testing.
Hands-on experience with power chip communication protocols (SPMI, PMBUS, SVI3, SVID, I2C) and PCB design; proven ability to drive bench validation plans for PMICs.
Experienced in managing end-to-end validation in a high-value semiconductor business unit, capable of technical leadership and mentorship.
Strong hands-on engineering focus with the ability to optimize and automate testing processes to reduce cost and improve quality.
Comfortable working across multiple time zones and collaborating with remote design and systems engineering teams.