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Strong Tier-1 employer and metro location, balanced by niche EDA specialization.
Highly specialized semiconductor EDA skillset limits cross-industry transferability.
Explicit 8+ years and mandatory Synthesis/PnR/STA expertise make filters strict.
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Own and drive RTL-to-GDSII design metrics on complex semiconductor designs.
Develop and implement innovative methodologies and solutions using Cadence tools and scripting techniques to solve customer design challenges.
Collaborate with sales and product teams to influence account strategy, product direction, and drive adoption of new technologies across customers.
Minimum 8+ years of experience in Digital Implementation flow on advanced semiconductor nodes.
Expertise required in one or more domains: Synthesis, Place and Route (PnR), or Static Timing Analysis (STA).
Bachelor’s or Master’s degree in Electrical/Electronics Engineering (BE/BTech/ME/MS/MTech).
Strong debugging skills and knowledge of scripting languages and flow development is a plus.
Strategic contributor with proven ability to independently manage complex RTL-to-GDSII implementation projects.
Experience working closely with top semiconductor customers, sales, and product teams to influence technology adoption and business strategies.
Demonstrated ability to develop creative, out-of-the-box technical solutions and mentor junior team members, with strong communication and cross-functional collaboration skills.