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Tier-1 brand and metro location increase competition, but niche ASIC verification reduces applicant density.
ASIC verification requires specialized hardware verification skills, limiting cross-industry transferability.
Explicit 1+ years plus mandatory SystemVerilog, UVM and verification tool experience enforces strict filtering.
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Plan and implement functional verification of IP/Cluster/SOC designs for NVIDIA Graphics Processors and Tegra SOCs.
Create regression plans and ensure functional and code coverage closure of RTL for verification.
Collaborate with hardware architects, designers, performance verification, FPGA, and software teams; participate in pre-silicon and post-silicon verification and debugging.
Bachelor's or Master's degree or equivalent experience.
At least 1 year of ASIC verification design experience involving complex design units across one or two projects.
Experience with verification tools such as VCS or equivalent simulators and debug tools like Debussy or GDB.
Exposure to System Verilog and UVM-based ASIC verification methodologies.
Experience with memory controller verification or IP/cluster verification involving memory access is advantageous.
Familiarity with scripting languages such as Python, Perl, or shell for automation and debugging.
Able to work collaboratively across hardware, software, and FPGA teams to deliver comprehensive verification solutions.