Back
Strong Tier-1 brand but niche hardware DV specialization reduces applicant density.
Highly specialized hardware verification skills poorly transferable across industries.
Explicit years, mandatory SystemVerilog/UVM/NOC skills and leadership make filters stringent.
Login to See Your Match Score
Create a free account or log in to unlock your CV match score across:
Lead end-to-end verification strategy, planning, and execution for complex IP/SoC subsystems focusing on NOC verification.
Architect and develop scalable UVM-based testbench environments including agents, scoreboards, monitors, sequences, and coverage models.
Manage concurrent projects, drive coverage closure and debug, mentor verification engineers, and collaborate with cross-site and cross-functional teams.
Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering or related field with 3+ years hardware engineering or related experience OR Master's with 2+ years OR PhD with 1+ year.
Strong hands-on expertise in SystemVerilog, UVM, and AMBA protocols (AXI/AHB/APB).
Proven experience in NOC verification with debugging and verification integration skills.
Scripting experience in Perl and/or Python; work experience required as per degree-experience mapping.
Experienced in leading verification teams and managing multiple projects end-to-end with ownership of timelines and quality.
Deep technical skills in UVM based environment architecture, constrained random verification, functional coverage, and SystemVerilog Assertions.
Experience with SoC/interconnect verification and automation/regression optimization preferred but not mandatory.