Back
Tier-1 employer and Bangalore metro location increase applicant density.
Highly domain-specific ASIC/SoC verification skills limit cross-industry transferability.
Explicit 8–12 years plus mandatory ASIC verification, SystemVerilog, UVM and coverage requirements.
Login to See Your Match Score
Create a free account or log in to unlock your CV match score across:
Lead design verification for complex CPU sub-systems and full chip within Infrastructure Processor Business Unit.
Develop and own test bench architecture, test plans, coverage plans, and verification methodologies for IP/subsystems.
Mentor and guide a team of design verification engineers, ensuring verification criteria are met.
Bachelor’s degree in Computer Science, Electrical Engineering or related field with 8-12 years experience, or Master’s/PhD with 6+ years experience.
Proven hands-on ASIC verification experience including environment and test development at SoC level.
Proficient in SystemVerilog, UVM, constrained-random stimulus, functional coverage; strong debug skills with tools like Verdi and Incisive.
Knowledge of AMBA protocols (AXI, AHB, APB), GIT version control; exposure to C language preferred.
Experienced in verifying complex processor subsystems, preferably with knowledge of ARM CPU cores and interrupt controllers.
Demonstrates ownership of verification flows and the ability to build test benches and plans from scratch for complex projects.
Senior engineer comfortable mentoring teams and managing end-to-end verification methodologies and coverage closure.