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Tier-1 brand, mid-level generic SWE title, metro location, and 2-5 years experience increase candidate competition.
Specialized EDA, circuit and parasitic extraction expertise limits transferability across industries.
Mandatory C++ and EDA/domain experience plus explicit 2+ years increases filtering but remains moderately flexible.
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Design and implement C++ software modules for parasitic extraction and EM/IR analysis within the Electrically Aware Design flow.
Analyze layout cross-sections and develop algorithms related to electronic design automation (EDA).
Collaborate with global R&D, product engineering, and application engineering teams to deliver robust EAD solutions with high code quality through testing and documentation.
Bachelor's or Master's degree in Electrical/Electronics or related fields (BE/BTech/ME/MS/MTech).
Minimum 2 years of software development experience, preferably in EDA or circuit design domains.
Strong programming skills in C++ and data structures; Qt experience is a plus.
Understanding of electronic circuits including parasitic effects and EM/IR analysis.
Experience working in electronic design automation or related circuit design technology environments.
Demonstrated ability to analyze layout data and develop algorithms within EDA software flows.
Ability to work across global teams including R&D and engineering for delivering complex design automation software.