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Tier-1 employer but highly specialized UVM verification skills limit applicant density, so medium competition.
Specialized semiconductor verification skills (SystemVerilog/UVM, RTL) are poorly transferable across industries.
Explicit 7-15 years, mandatory UVM/SystemVerilog/UVM-from-scratch requirements make filters highly strict.
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Lead full-chip functional verification for Micron’s non-volatile memory design projects, covering design specs and verification plans.
Develop System Verilog test benches and UVM environments from scratch to achieve complete functionality coverage and close verification holes before tape-out.
Develop and support NAND Flash behavioral models; collaborate with design and application engineers to ensure accurate design implementation and verification.
MS or BS degree in Electrical or Computer Engineering or equivalent.
7-15 years of experience in verification collateral development using Verilog, System Verilog, and UVM.
Proficiency in UVM and experience building complex, coverage-driven random constraint UVM environments from scratch.
Strong knowledge of digital circuit design, RTL coding (Verilog/System Verilog), and programming in C++ and scripting languages like TCL and PERL.
Experienced in verification methodologies specifically for complex memory technologies and NAND Flash design.
Ability to use AI-assisted coding tools and workflows to improve verification efficiency and automation.
Proven track record of collaborating closely with digital design and applications teams in multi-disciplinary environments.