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Tier-1 brand and Bangalore location increase applicant density, but niche ASIC validation skills limit broad competition.
Deep ASIC/SoC validation, protocol, and bring-up expertise makes this role highly domain-specific and less transferable.
Multiple mandatory hardware verification protocols, emulation, UVM/SystemVerilog, and explicit experience create stringent filters.
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Own end-to-end verification and validation flows for one or more SoC subsystems, including planning, execution, and closure.
Develop and execute complex test plans across pre-silicon simulation/emulation and post-silicon bring-up and validation phases.
Debug and root-cause issues using advanced tools and methodologies, and maintain automated test and regression environments.
5-8+ years of experience in SoC pre- and post-silicon verification, validation, and bring-up.
Degree required: BE or MS in Electrical Engineering or Computer Engineering.
Proficient in SystemVerilog, UVM, embedded C programming, and hardware/software co-validation.
Experience with industry-standard protocols such as PCIe, DDR, LPDDR, USB, Ethernet, I2C, SPI, AXI, AHB, APB, and emulation platforms (e.g., Palladium).
Experienced working independently on complex SoC validation tasks involving pre- and post-silicon phases and cross-functional collaboration.
Strong expertise in debugging at SoC level across digital logic, firmware, timing, and low-power domains with tools like JTAG, trace, and waveform analysis.
Comfortable developing firmware, HAL, and automation scripts in C, Python, or Perl to support validation infrastructure and regression automation.