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Popular intern software-engineer role in metro but niche low-latency/FPGA skills moderate competition.
High; low-latency C++, FPGA and systems skills are specialized and not widely transferable.
High CGPA cutoff, specific graduation year and technical prerequisites enforce strict shortlisting.
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Own the design, development, and optimization of ultra-low latency systems critical to live trading operations.
Deliver measurable latency improvements through performance profiling, benchmarking, and deployment of production-quality systems.
Collaborate with quantitative researchers and infrastructure engineers to translate complex performance challenges into scalable solutions.
Pursuing a Bachelor's or Integrated Master's degree in Computer Science, Electrical Engineering, or Mathematics with expected graduation in 2028.
Strong programming skills in modern C++ with a solid understanding of operating systems, computer architecture, data structures, and concurrency/networking or systems programming.
Minimum CGPA of 8.5 with no active backlogs.
Work Experience Required: Not explicitly mentioned in the JD.
Demonstrates strong analytical thinking with hands-on experience or coursework in performance optimization, concurrency, and low-level systems programming.
Operates well in high-pressure, performance-critical environments requiring attention to detail at nanosecond-level optimization.
Comfortable collaborating with cross-functional teams (quantitative researchers and infrastructure engineers) to solve complex system challenges and deliver production results.