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Tier-1 brand and Bangalore metro increase applicant density but role is niche hardware DV specialization.
Highly specialized CPU DV skills strongly bias toward semiconductor and hardware teams, limiting transferability.
Explicit years, mandatory HDL/verification skills, CPU architecture and power-management experience make filters strict.
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Develop and execute verification plans for RISC-V CPU units and features, including simulation and formal verification.
Collaborate with architects, design, software, SoC, and emulation teams to validate CPU and system use cases and debug issues across simulation, emulation, and silicon.
Implement assembly and C language tests for CPU architecture verification and develop testbench components such as checkers, assertions, and stimulus generators.
Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related field with 4+ years of relevant hardware engineering work experience (or Master’s with 3+ years, PhD with 2+ years).
Experience with CPU architecture verification, especially RISC-V, including power management features (clock gating, power gating, UPF, DVFS/DCVS).
Proficiency in C/C++, scripting languages, and HDLs like Verilog/SystemVerilog.
Work Experience Required: 4+ years hardware verification or related experience (depending on degree).
Experienced with CPU microarchitecture and architecture verification, preferably with industry CPU architecture exposure (e.g., x86, ARM, MIPS, RISC-V, POWER).
Demonstrated ability to use advanced verification methodologies including formal verification and assertions.
Familiarity with power management verification in CPUs and SoCs and knowledge of DFT and debug architectures (JTAG, IEEE1500, MBIST) seen as an advantage.