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Moderate applicant density: niche EDA/compiler skills limit applicants despite common Software Engineer title and early-mid experience.
Strong EDA, compiler and HDL specialization reduces cross-industry transferability.
Explicit 1–4 years plus mandatory C++, EDA, and HDL experience makes filters strict.
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Design and implement front-end compiler components for hardware description languages like Verilog, SystemVerilog, and VHDL using C++ and flex/bison.
Ensure functional quality and on-time delivery of compiler front-end software across all required platforms.
Analyze complex compiler workflows and provide optimal software solutions while mentoring colleagues and contributing to overall system quality.
1 to 4 years of software development experience.
Proficiency in C++, algorithms, and data structures.
Working knowledge of Verilog, SystemVerilog, and VHDL.
Bachelor's degree in Computer Science, Electrical Engineering, Computer Engineering, or equivalent experience.
Experienced in front-end EDA software development with strong problem-solving skills in compiler or hardware language domains.
Capable of working independently and collaboratively on complex software projects with mentorship responsibilities.
Familiar with tools like flex/bison and concepts of gate-level digital logic design to enhance compiler front-end solutions.