





Tier-1 brand and metro location, but specialized verification skillset limits applicant pool.
Hardware SV/UVM and CPU-subsystem expertise is highly specialized and not easily transferable across industries.
Explicit years plus mandatory SV/UVM and CPU-subsystem verification skills create strict technical filters.
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Own verification of Audio or Auxiliary CPU Sub-Systems at unit, cluster, and SoC levels, focusing on verification closure and quality.
Develop UVM-based testbenches and verification components/APIs for CPU sub-systems related to Audio processing, Functional Safety, RAS, BOOT, and power management.
Collaborate with architects, designers, FPGA, and post-silicon teams to ensure robustness and implement feedback-driven improvements.
Bachelor's or Master's in ECE, EE, CSE, or equivalent degree.
Over 2 years of experience in verification closure for complex units, sub-systems, or SoC level verification.
Proven experience with RISCV, ARM, or DSP core-based CPU sub-systems.
Experience with SystemVerilog, UVM methodologies, and industry-standard verification tools.
Demonstrated ability to architect verification environments using SV/UVM and develop reusable verification IP blocks.
Experience working in cross-functional teams covering design, FPGA, and post-silicon validation phases.
Hands-on exposure to Audio functions, safety and reliability features, BOOT, power management, and formal verification is a plus.