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Tier-1 employer and mid-level experience increase competition despite niche hardware verification specialization.
Highly specialized SoC verification skills limit cross-industry transferability.
Requires specific SV/UVM, CPU-subsystem verification experience and SoC closure expertise.
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Own verification closure of Audio or Auxiliary CPU sub-systems at unit, cluster, and SoC levels within automotive chips projects.
Develop UVM-based verification test benches and methodologies, including building reusable components, test plans, and functional coverage for dedicated CPU sub-systems targeting Audio processing, Functional Safety, RAS, BOOT, and power management.
Collaborate with architects, designers, FPGA, and post-silicon teams to ensure robustness and drive improvements based on verification and bug escape feedback.
BTech or MTech degree in ECE, EE, CSE, or equivalent.
Over 2 years of experience in verification closure of complex units, sub-systems, or SoC level verification.
Experience with RISCV, ARM, or DSP core based CPU sub-systems and verification methodologies such as SV and UVM.
Proficiency in debugging and analytical skills with exposure to industry-standard verification tools for simulation and debug.
Experienced in complex SoC verification environments focusing on CPU sub-systems related to Audio processing, safety, and power management.
Capable of independently architecting test benches and verification infrastructure using SystemVerilog, UVM, and C/C++ methodologies.
Demonstrates collaboration skills in matrix, global teams and familiarity with latest tools and optional skills like Formal verification or AI-assisted code development is a plus.