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Tier-1 employer plus Bangalore location increase competition, while niche formal verification skills moderate applicant pool.
Highly specialized hardware formal verification skills limit transferability across industries.
Explicit 6+ years, mandatory formal tool proficiency, and domain-specific low-power skills create strict filters.
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Lead formal verification of complex hardware design blocks using advanced formal verification tools and methodologies to ensure exhaustive and high-confidence sign-off.
Collaborate with global architecture, design, and systems teams to define and achieve verification goals and improve sign-off quality.
Develop and maintain automation scripts (preferably Python) to enhance efficiency and scalability of formal verification flows, including low power formal methodologies.
6+ years of hands-on experience in Formal Verification for hardware designs.
Bachelor's degree (or higher) in Computer Science, Electrical/Electronics Engineering, or related field with minimum 4 years (Bachelor's) or 3 years (Master's) or 2 years (PhD) of relevant hardware engineering experience.
Proficiency with formal verification tools such as Jasper, VC Formal, or Questa Formal.
Strong scripting skills, particularly in Python.
Demonstrated expertise in formal verification methods including proof strategies, constraint management, and property-based verification (SVA preferred).
Experience engaging with EDA tool vendors and evaluating advanced verification methodologies to enhance quality and efficiency.
Familiarity with low power verification concepts and power-aware methodologies (UPF/CPF, power gating) is advantageous.