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Tier-1 brand and Bangalore metro increase applicant density despite niche, senior CAD specialization.
High because CAD/EDA SoC expertise and large-scale SoC program experience are highly specialized and industry-specific.
High due to mandatory 18+ years, specialized VLSI CAD expertise, tooling requirements, and leadership expectations.
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Lead architecture, implementation, and optimization of front-end CAD/EDA flows for multiple large-scale SoC programs, including RTL linting, CDC, synthesis, and formal verification.
Drive AI/ML-driven automation initiatives to enhance RTL quality, tool efficiency, and design debugging capabilities.
Manage and mentor CAD/EDA engineering teams across locations, collaborate with EDA vendors and cross-functional teams to align tools and workflows with program milestones.
Bachelor’s degree in Electronics Engineering or related field (Master’s degree is a plus).
18+ years of progressive experience in VLSI industry focusing on frontend CAD/EDA tools, flows, and infrastructure.
Proven leadership experience managing CAD teams supporting large-scale SoC programs.
Strong programming and scripting skills in Python, Perl, Shell, and Makefiles.
Deep technical expertise in SoC front-end design flows, RTL quality metrics, synthesis, formal verification, and tool integration.
Experience applying AI/ML techniques to automate and optimize CAD tool flows and design processes.
Demonstrated ability to lead high-complexity projects and teams, collaborate effectively with vendors and cross-functional groups across multiple sites.