Back
Tier-1 employer and metro location increase competition, while seniority and niche verification expertise reduce broad applicant pool.
Highly specialized semiconductor verification skills and SoC experience limit transferability across industries.
Explicit 15+ years and mandatory SystemVerilog/UVM and SoC verification expertise enforce strict filtering.
Login to See Your Match Score
Create a free account or log in to unlock your CV match score across:
Define and lead verification strategy and architecture for complex Edge AI-based digital designs across multiple projects and teams.
Drive advanced verification methodologies and frameworks to achieve zero-defect chip delivery and organizational-wide verification improvement.
Manage and mentor a verification team, coordinate verification efforts with cross-functional teams including design, product, test engineering, silicon validation, and software for first-pass silicon success and production quality.
Master's degree or PhD in Electrical Engineering, Computer Engineering, or related field.
15+ years of experience in verification with complex digital SOC designs, including leadership of verification teams or major initiatives.
Expert-level knowledge of SystemVerilog and UVM, with deep understanding of digital SoC design principles and protocols such as AHB/AXI.
Experience must include strategic verification architecture, advanced RTL/System level and GLS debugging, and proven ability to influence verification direction organization-wide.
Senior technical leader with demonstrated capability to lead complex verification strategies and deliver no-defect digital SOCs in an Edge AI environment.
Experienced manager skilled at scaling verification teams and collaborating cross-organization to meet verification and quality standards.
Innovator in verification methodologies with a track record of advancing state-of-the-art approaches and mentoring engineers across levels.