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Tier-1 employer plus metro location increases applicant density despite specialized ASIC skill requirements.
ASIC verification is hardware-centric and requires domain-specific skills, limiting cross-industry transferability.
Explicit 0–2 years plus mandatory hardware verification and programming skills create moderately strict filters.
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Build and maintain tools, infrastructure, and test frameworks for RTL-simulations, C-simulations, Emulation, FPGA, and Silicon testing.
Develop features for Silicon bring-up including components related to FUSE, ATE, Security, Flash/DMA, Board I2Cs, USB debug devices.
Support Design and Verification teams by enabling access to registers, memory, DMA engines, and facilitate test reuse across platforms (RTL, models, Emulation, Silicon).
BS or MS in Computer Science, Electronics Engineering, or equivalent experience.
0-2 years of relevant work experience.
Proficiency in programming languages: C, C++, Python.
Understanding of SoC and system architecture, SOC devices (DMA, interrupt-engines, CPU, boot-devices, MMU/IOMMU), and bare-metal test framework development.
Experience or exposure to Silicon Bring-up and enabling Emulation/FPGA test frameworks.
Familiarity with testbench architectures including C++ testbenches and SV/UVM based testbenches.
Basic knowledge or skills in Verilog/System Verilog are a plus but not mandatory.