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Strong Tier-1 brand and Bangalore metro location balanced by niche hardware verification specialization.
Highly specialized semiconductor verification skills with limited transferability across industries.
Explicit years requirement plus mandatory SV/UVM and HSIO verification experience increases selectivity.
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Own verification of HSIO IP cluster and SOC level for automotive chips, ensuring robustness of high-speed IO IPs and sub-systems like USB, UFS, MPHY, Ethernet, and MACSEC.
Architect and develop verification environments using SystemVerilog and C/C++ methodologies including test plans, BFM, monitors, checkers, and SOC verification closure.
Collaborate with architects, designers, FPGA, and post-silicon teams to drive verification closure and quality assurance.
BTech or MTech in ECE, EE, CSE, or equivalent degree mandatory.
Over 4 years of experience in verification closure of complex units, sub-systems, or SOC level verification.
Proven experience in High Speed IO verification (UFS/PCIE/XUSB) and knowledge of 10G/1G Ethernet MAC and Switch.
Experience with SystemVerilog and UVM methodologies and industry-standard verification tools; no explicit mention of notice period.
Experienced in SOC level verification and high-speed IO IPs with strong ownership of verification environments and closure.
Able to work with complex SoC blocks involving CPU, memory subsystems, NOC, and advanced interconnect fabrics suitable for automotive chips.
Candidates with additional exposure to AI assisted code development and formal verification practices have an edge.