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Tier-1 brand, metro location, and mid-level experience amplify candidate competition.
Hardware ASIC verification skills are highly specialized and not easily transferable across industries.
Mandatory 4–7 years plus strong hardware verification, SystemVerilog/UVM and protocol expertise increases filtering strictness.
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Define and execute ASIC verification plans independently including testbench architecture, testcases, and gate-level simulations.
Develop IP level verification and testbench components for serial and memory protocols such as UFS, PCIe, USB, and AXI.
Drive continuous quality and process improvements in ASIC verification activities.
Bachelor of Engineering degree mandatory.
4-7 years of work experience in ASIC verification engineering.
Proficient in System Verilog, UVM, Verilog, and gate-level simulation.
Experience with serial protocols (UFS, PCIe, USB, MIPI) and memory protocols (AXI, PCIe, UFS, Flash), plus scripting skills in Python or Perl.
Strong operational ownership of ASIC verification including planning and execution with minimal supervision.
Experienced in IP level verification and testbench development for complex serial and memory interfaces.
Practitioner focused on process efficiency and quality improvements in verification workflows.