Back
Tier-1 employer and Bangalore location increase competition, but specialized ASIC verification skills moderate applicant density.
Highly specialized ASIC/SoC verification skills limit transferability across industries and roles.
Explicit 9-13 years and mandatory SystemVerilog/UVM, coverage-driven verification and protocol knowledge create strict filters.
Login to See Your Match Score
Create a free account or log in to unlock your CV match score across:
Drive verification strategy and create comprehensive Test Plans and Test Benches for SoC ASIC hardware validation.
Collaborate with architects, designers, and verification teams to develop C-based tests and meet functional coverage goals for data storage controller SoCs.
Run and debug gate-level simulations and generate functional patterns for Automatic Test Equipment (ATE) to support SoC verification.
Bachelor's or Master's degree in Electrical Engineering or Computer Engineering.
9-13 years of relevant work experience in SoC verification or ASIC development engineering.
Strong proficiency in C, System Verilog UVM, coverage-driven verification methodology, and UVM based verification methodology development.
Experience with test plan creation, gate-level simulation, and knowledge of bus protocols (APB, AHB, AXI) and interfaces (PCIe, DP, UART, I2C, I2S, SPI, USB, SD).
Experienced engineer proficient in advanced verification methodologies with a history of building and improving UVM test environments.
Skilled collaborator capable of coordinating with architects and multiple verification teams to drive verification strategy.
Technical expert comfortable with complex SoC verification tools and practices including C test development, gate-level and power-aware simulations, and scripting (Python, Perl, TCL, BASH).