Back
Tier-1 employer in Bangalore with mid-level engineering demand and desirable verification skillset.
Specialized PCIe ASIC verification skills limit cross-industry transferability.
Mandatory ASIC verification, SystemVerilog/UVM and 2+ years experience make screening stringent.
Login to See Your Match Score
Create a free account or log in to unlock your CV match score across:
Verify ASIC design and architecture of PCIe controllers at IP/sub-system levels using advanced methodologies like UVM.
Develop test plans, reusable bus functional models, monitors, checkers, and scoreboards to ensure design correctness.
Collaborate with architects, designers, and verification teams (pre and post silicon) to accomplish verification tasks.
B.Tech./M.Tech or equivalent experience.
At least 2 years of relevant verification experience at Unit/Sub-system/SoC level.
Proficiency in Verilog and SystemVerilog, with knowledge of constrained random verification and functional coverage.
Experience in verifying IP or interconnect protocols such as PCI Express, USB, or SATA; familiarity with DV methodologies like UVM/VMM and industry-standard simulation/debug tools.
Strong knowledge of PCIe protocol Gen3 and above and understanding of system-level PCIe/CXL design architecture.
Experience developing verification infrastructure including scripting skills in Perl, Python, or similar languages.
Ability to independently define verification scope and develop comprehensive test plans while collaborating effectively with multiple engineering teams.